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DP83848I 100M Testing mode for eye diagram- rising edge etc...

Zhou Fang67
Expert 4250 points

Hi Expert,

Does DP83848 support 100M testing mode? My customer buys a specified oscilloscope to test Ethernet signal integrity. The PHY device needs to have a testing mode which generates testing waveform by itself, then the equipment can directly verify eye-diagram, delay, rising edge etc...

If there a app note to describe how to configure this function in register?

Thanks a lot.

Zhou

  • 0
    TI__Mastermind 23675 points

    Hi Zhou,

    For 100M testing you don't need any special configuration. All you need to do is force it to 100M operation. This can be done in either software through register access by setting register 0x0000 to 0x2100 or through hardware bootstrap. Please see the datasheet for bootstrap information.

    Kind reg,

    Ross

  • 0 in reply to Ross Pimentel
    TI__Expert 4250 points
    Hi Ross,

    I may not understand correctly. 0x0000 to 0x2100 setting PHY for 100M mode, we are looking for a test mode configuration.

    The procedures may have been instructed in following application note, does this app note applicable to DP83848? I see DP83867 is used as an example.
    www.ti.com/.../snla239.pdf

    Thanks.
    Zhou
  • 0 in reply to Zhou Fang67
    TI__Mastermind 23675 points

    Hi Zhou,

    For 100Mbps testing (100BASE-TX) there is no special test mode configuration needed.

    All you need to do if force the PHY to output 100Mbps signaling (i.e. set register 0x0000 which is the BMC Register to the value of 0x2100).

    This forces 100Mbps operation and disables auto-negotiation.

    The other option is to use bootstraps and force AN_EN = '0', AN_1 = '1', AN_0 = '1'.

    This means you need to add a pull-down resistor to pin #26 (LED_ACT), add a pull-down resistor to pin #27 (LED_SPEED) and #28 (LED_LINK).

    Kind regards,

    Ross