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some questions about 2 port TPS65982D application

Other Parts Discussed in Thread: TPS65982D, TPS65982

Hello,

my customer design 2 port usb type-C PD in their application(Note PC), it is used two TPS65982D, and this applicaiton not has DC barrel jack. so my customer have below urgent quesions about 2port TPS65982D design.

1 HV_GATE control HV_GATE1/2 could control separately by EC or not?
2 HV_GATE control At dead battery condition, how about HV_GATE1/2 default state when PD source attach?
If defaut is active, 2 port power may short when 2 power source attach together at dead battery mode. Prefer HV_GATE1/2 defalut setting is short prevent condition, like only active HV_GATE1, is it possible?
3 PD power source switch System support 2 PD ports, when 1 port used with 5V adapter, another port plug 20V adapter, how to switch ? What's the process?
4 PDC FW update tool & method  How about the PDC FW update tool and method in OS
5 PDC FW update tool & method How about the PDC FW and AR FW combine rule and method?
6 I2C We heard TPS65982D have I2C comunication issue, does it solved? How about TPS65982?
7 FW load 1st and 2nd PDC FW load sequence timing.
a) PDC power on stable, 1st  PDC need how long time to start read SPI FW?
b) How long time need the 1st PDC config FW itself takes?
c) when 1st
  FW config finished, how long time need to  transport the FW to 2nd PD through UART Bus?
8 Reset Normally keep 2nd PC ID HRESET NC during two type-C circuit design.
a) How the 2nd PD hardware reset works, is it reset by 1st PD I2C command?
b) If remain this reset to EC, when execute this signal ? after 1st FW config finish?
 
  Current limit PD current limit controlled by EC dynamically and inform profile to USB PD device.
Is it possible control PD port current limit as below
a. Can EC/PDC control current limit value when it detected USB device?
b. USB device(sink) attached, system support 5V/3A. So device use 5V/3A, then EC request PDC change to support 5V/1A, PDC inform device, device reduce power to under 5V/1A
 
  • Dear,

    please help to ansower those qusitons. if you konw.

    thanks and best regards

    Steven

  • Hi Steven,

    Here are the responces to your queries:

    1 HV_GATE control HV_GATE1/2 could control separately by EC or not?
      HV_GATE1/2 cant be controlled directly by EC
    2 HV_GATE control At dead battery condition, how about HV_GATE1/2 default state when PD source attach?
    If defaut is active, 2 port power may short when 2 power source attach together at dead battery mode. Prefer HV_GATE1/2 defalut setting is short prevent condition, like only active HV_GATE1, is it possible?
    Default state is off on power on, however depending on the status of BUSPOWERZ line these lines can turn on once they are booted up
    3 PD power source switch System support 2 PD ports, when 1 port used with 5V adapter, another port plug 20V adapter, how to switch ? What's the process?
    The EC need to query both the PD controllers and then depending on the priority needs to choose one
    4 PDC FW update tool & method  How about the PDC FW update tool and method in OS
    You need to use the EC to update the FW of the PD controller over I2C
    5 PDC FW update tool & method How about the PDC FW and AR FW combine rule and method?
    If by AR you mean Alpine Ridge then Intel will provide the details and required software utility
    6 I2C We heard TPS65982D have I2C comunication issue, does it solved? How about TPS65982?
    There's no issue in I2C communication in TPS65982 or TPS65982D
    7 FW load 1st and 2nd PDC FW load sequence timing.
    a) PDC power on stable, 1st  PDC need how long time to start read SPI FW?
    b) How long time need the 1st PDC config FW itself takes?
    c) when 1st  FW config finished, how long time need to  transport the FW to 2nd PD through UART Bus?
    First the primary PD controller boots and then the secondary PD controller. The first PD controller takes around 600ms to boot if the SPI flash is available else it can take much more time. The secondary PD controller takes around 2.5s to boot once the primary controller is booted up
    8 Reset Normally keep 2nd PC ID HRESET NC during two type-C circuit design.
    a) How the 2nd PD hardware reset works, is it reset by 1st PD I2C command?
    b) If remain this reset to EC, when execute this signal ? after 1st FW config finish? 
    I am not sure what are you asking, please rephrase the question
    Current limit PD current limit controlled by EC dynamically and inform profile to USB PD device.
    Is it possible control PD port current limit as below
    a. Can EC/PDC control current limit value when it detected USB device?
    b. USB device(sink) attached, system support 5V/3A. So device use 5V/3A, then EC request PDC change to support 5V/1A, PDC inform device, device reduce power to under 5V/1A 
    PD controller controls all the power related negotiations all these negotiations depends on what gets connected to the port. It's possible to reduce the PDO from 5V/3A to 5V/1A but then the sink needs to support 5V/1A as well otherwise it will reject the trransition and it will stop working

    Thanks,

    Rahul

  • TI_QA_List_TPS65982D_0930_feedback.xlsxHello Rahul,

    Thanks for your ansower.

    my customer have some added for those questions, could you help to ansower?Thanks.

    please see the attached excel QA file.

    thanks and best regards.

    Steven

  • Hello Rahul,

    please kindly help to urgent ansower, my customer is waiting.

    2148.TI_QA_List_TPS65982D_0930_feedback.xlsx

    thanks and best regards.

    Steven

  • Hi Steven,

    The attached xls file cantains the answers.

    Thanks,

    Rahul

    Copy of 2148.TI_QA_List_TPS65982D_0930_feedback.xlsx

  • Hi Rahul,

    Thanks for your great help.
    if i have any added quetions, i wll contact will local FAE.

    thanks and best regards
    Steven
  • Hi Steven,

    Then for now I'll close the case.

    Thanks,
    Rahul