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DP83867 timing spec

Ryuuichi machida
Guru 13040 points


Hi Expert,

I would like you to confirm about RGMII timing spec of DP83867.

I described about our questions for datasheet below, so could you please confirm those ?

Best Regards,

Machida

  • 0
    TI__Mastermind 19780 points
    Hi Machida-san,

    Q1. TX and RX groups are symmetrical according to RGMII spec. The TskewT and TskewR are the same for both directions.

    Q2. In the case of TX data, the SOC is the transmitter and the DP83867 is the receiver.

    Q3. The timing is symmetrical between TX and RX groups when looking at setup/hold time as well.

    Q4. In the case of RX data, the DP83867 is the transmitter and the SOC is the receiver.

    Q5. Yes, Internal Delay is a feature of RGMII v2.0

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Guru 13040 points

    Hi Rob-san,

    Thank you for your reply.
    Let me confirm about following additional two.

    * Should Following rise/fall time spec be applied for all MAC interface signals(RXC/TXC, RXD/TXD. RX_CTL/TX_CTL) ?
    * Should following rise/fall spec be applied for all voltage range (1.8V, 2.5V and 3.3V) ?

    Best Regards,

    Machida

  • 0 in reply to Ryuuichi machida
    TI__Mastermind 19780 points
    Hi Machida-san,

    Yes this applies to all the signals in the standard.

    Rise/file times should be applied for all voltage ranges.

    Best Regards,