This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[SN65DSI85] connection confirmation

Other Parts Discussed in Thread: SN65DSI85

Hi,

I would like you to confirm whether following connection is allowed or not.

* We want to connect SN65DSI85 to DS90UH947.

I understand that single-link LVDS connection have no problem. However, I would like you to confirm when DS90UH947 required dual-link LVDS connection.

DS90UH947 have only one pair LVDS clock and 8 pair data lanes. So, when DS90UH947 required dual-link LVDS connection, following connection will be required.

I understand when SN65DSI85 is set "Dual link LVDS" mode, both A_CLKP/N and B_CLKP/N are output.

So, I think that B_CLKP/N (or A_CLKP/N) should be terminated. Could you please confirm whether above usecase is available or not ?

Best Regards,

Machida

  • Hello Machida

    Your application should work. For the unused LVDS clock output pair, you have to terminate the signals using a 100 ohm load.

    Theoretically, the CLK distribution should be nearly identical between two LVDS interfaces since both LVDS CLKS are generated from one CLK source so they are the same between two as the datasheet says.  The skew is possible due to other mismatches but should not be greater than 10ps.

    Regards

  • Hello Joel,

              My customer is  using SN65DSI85 in their MIPI to LVDS application, now they use only A channel as input, so we want to know how to process the other  B channel, Let them float or pull down to ground? could you please help to conform for us, Thanks. 

  • Leave unused DSI input terminals (DA*N/P, DB*N/P) unconnected or driven to LP11 state.

    Regards