HI Team,
I'm hoping you might be able to help us with this query.
We are designing in the TLK10232 and working on PCB pair and bus track length matching. In the EVM guide SLLU180–June 2013 it states on page 1 of the schematic (page 16 of the EVM) that: "5. SERIAL AND REFCLK NETS MUST MATCH WITHIN +/- 0.5 MILS". This equates to 0.0127 mm and is incredibly tight especially as the tracks might be 6 to 10 mils (0.15 to 0.25 mm) wide.
Please can you clarify this for us.
