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DP83867 RGMII Rx/Tx CLOCK SKEW

reto hermann
Intellectual 720 points

Hello,

I've got a question about the strap configuration of the Rx/Tx clock skew. We have chosen Mode 4 according the DP83867 DS (www.ti.com/.../dp83867ir.pdf) and expected a delay of 2.0 ns: 

According the Application Report SNLA243 (www.ti.com/.../snla243.pdf) Table 5 on page 7 there is a table that contradicts the information in the data sheet. According this document Mode 1 corresponds to 2.0ns skew:

Which table is correct ? 

What confuses me even more is that when I read  the register  of the RGMIIDCTL (0x86) register via SMI, I read 0x0091, instead of 0x0077. 

Thank you for your help!

Reto

 

  • 0
    TI__Mastermind 19780 points
    Hi Reto,

    Which device are you using? The IRRGZ or IRPAP? IRRGZ I hope as IRPAP does not support strapping RGMII delays.

    The application report table is correct and the table in the DS will be updated.

    When leaving the strap pins open, you should read 0x77 in register 0x86 as you indicated.

    Regards,
  • 0 in reply to Rob Rodrigues
    Intellectual 720 points

    Hi Rob,

    thank you for your quick reply. I'm using the device DP83867IRRGZ and yes, when I leave the strap pins open, I read the specified default value 0x0077 in the register x086. 

    The problem with the strap pins in my application is, that I have connected some of them (RGMII interface) to an FPGA and there are weak pull-up resistors in the FPGA that I can't turn off. That's why I can't leave the strap pins 'open'. When I avoid strap mode 1, the impact of these pull-up resistors should not be too strong, but because I don't know the tolerance of these resistors it's hard say what strap voltage will result for the strap modes 2,3 and 4.

    In the datasheet I have found the following information:

    My question is now: What is Vmin and Vmax? Is this the resulting strap voltage because of the internal 25% tolerance resistor OR is this the specification of the strap voltage that must be fulfilled to be sure that the corresponding mode is selected? Can you give me additional information what happens when the strap voltage is between 0.065*Vdd and 0.139*Vdd or between 0.16*Vdd and 0.228*Vdd or between 0.256 and 0.728 or above 0.82*Vdd?

    Best regards

    Reto 

  • 0 in reply to reto hermann
    TI__Mastermind 19780 points
    Hi Reto,

    Vmin and Vmax are the threshold voltages required to enter the strap mode. Vmin and Vmax does not take into account the resistors. If you force this voltage on the pin, the strap will enter that mode.

    There is indeterminate behavior when you enter the voltage guard bands between strap modes. The exception to this is that above 0.82*VDDIO, you will always enter mode 4 because there is no strap level above it.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Prodigy 70 points

    Data sheet still not updated Feb 2017.