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How to imporve the transfer speed of XIO2001 which connect to TMS320C6416 via pci interface.

Other Parts Discussed in Thread: XIO2001, TMS320C6416

        Our current device use XIO2001 bridge, the PCIE side connect to NXP's P1020 and the PCI side connect to TMS320C6416.After test, we can only get 84MB/S burst transfer speed from TMS320C6416 prefetchable memory region to local DDR which initiated by the P1020.
        However we have anohter device which use MPC8541's PCI interface connect to TMS320C6416. By using the same test program, we got 127MB/S from TMS320C6416 prefetchable memory region to local DDR.

    After capture the signals,we got the following informations:
        1.when P1020 start a DMA transfer, the XIO2001 would try to start a burst transfer with multiple read commoand code(CBE=b1100).
        2.The TMS320C6416 will pull down the STOP signal and  theTRDY singl remain high which indictate it is not ready, after that  XIO2001 will pull up the FRAME signal to stop the transfer.
        3.After about 6 clock cycles, XIO2001 start to retry step 1 until the  TMS320C6416 got ready (TRDY signal pull down and the STOP signal pull up).
        4.After the  XIO2001 retried about 5 times which consume about 32 clocks cycles,XIO2001 enter a valid burst transfer stage which last for 64 clock cycles
    We wanted to know is there anything we can do to imporve the performance?

Thanks a lot.

  • Hello,
    84MB/s is not too bad for any PCIe-to-PCI bridge, you can adjust the MRRS, and pre-fetch setting to increase the throughput.
    Please follow the below links for more information.
    Regards

    www.youtube.com/watch
    www.ti.com/.../scpc009
    e2e.ti.com/.../2005218
  • Thank you very much for your reply.
    Following your guidance we have tried to change the value of MRSS to 512B,1024B,2048B but without effect.
    Now our main problem is the short pci read burst length.When the cpu(p1020) initiate a DMA transfer from TMS320C6416 to local ddr we found the following test information:
    1. The xio2001 pci read burst length always be 256 bytes no matter how we changed the value of MRSS or PFA_REQ_LENGTH_LIMIT.
    2. If we change the MaxReadReq size of cpu(p1020) to 128 bytes and leave the xio2001 MaxReadReq size as default value(512 bytes).The xio2001 pci read burst length will be 128 bytes.
    3. If we change the MaxReadReq size of xio2001 to 128 bytes and leave the cpu(p1020) as its default value(512 bytes). The xio2001 pci burst length is still 256 bytes.
    It seems that the Auto-prefetch agent has no effection at all, In test 2 and test 3 we leave the Pre-Fetch Agent Request Limits Register as default value 0x0443.
    Our p1020 maxpayload size is 256B, and default MaxReadReq is 512B.Could you give us some advise on how to increasing the pci read burst length? thank your very much!
  • Hello,
    So the processor is overwriting the values on the XIo2001, you can use an external eEPROM to load the pre-fetch agent values.
    Please look at the Section 8.3.8.3 in the datasheet.
    We have a windows based tool to program an EEPROM attached to the XIO2001, please provide an email address and we can send it to you.
    Regards
  • Hello,

    My email is liukejob@qq.com,We really appreciate your patience, thank you very much!

    Regards