• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 33 subscribers
  • Views 461 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Failure condition of Dp83848i

yoshiki hasebe
Mastermind 6385 points
Other Parts Discussed in Thread: DP83848I

Dear Sirs,

My customer asked me about  failure condition of DP83848i.

For example,
In the condition that the input information to the TXD port has caused a bit garbled by an internal failure of the IC, Do you have that information different from TD port as a failure mode is output?

Internal fault and is, for example,
Failure of the IC of the clock generation functions and register function in the page data sheet 27.

Because it is a problem the feed you want information would be replaced by different information.

Best Regards,

Y.Hasebe

  • 0
    TI__Mastermind 18425 points
    Hello,

    TXD port is input to the PHY and driven by the processor. If there is a data error on the TXD port then the transmitting PHY will not be able to identify it. DP83848 has a receive error counter which increments when a error packet is received. So the error in trasmitting data will be detected at the receiving end.

    Re-transmitting corrupted packet is a higher layer application and needs to be implemented in the processor.

    -Regards,
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    Mastermind 6385 points

    Hello Aniruddha-san,

    Thank you for your quick reply.

    I understand your comment.

    I will tell my customer this comment.

    Best Regards,

    Y.Hasebe