I have a customer who is asking the following question on the DS90UB925Q/ DS90UB928Q Adaptive Equalization:
I am pairing your DS90UB925Q serializer with your DS90UB928Q deserializer. The PCLK frequency into the 925 is 40 Mhz and hence I am nowhere near the top-end capability of this part. The cable length is 3 meters. But I am trying to use 9 different pairs of these {925 + 928} chips in order to connect 9 remote devices to a common host. Everything works fine when only one pair is connected, but as I add more pairs I notice the communication channel starts making errors. One theory I have concerns the adaptive equalization. Your 928 datasheet shows a register (at address 68) that has a bit that clearly enables/disables adaptive equalization. When adaptive equalization is disabled, this same register has 2 sets of 3 bits that specify the first and second stage equalization settings. That I understand. But the 928 datasheet also show a “Adaptive Eq Status” register (at address 59) which has 6 bits. Are these 6 bits actually 2 sets of 3 bits corresponding to 2 different equalizers? I observe these 6 bits wandering constantly. I doubt this is good. What kicks off the adaptive equalization? Maybe it is always running. How many of the bits in the equalization setting should toggle during operation? I suspect my 9 pairs are interfering with each other.
Please let me know if you have any further questions for the customer.
Thanks for your help with this!
Richard Elmquist
