Hi all
I would like to know the following question.
My customer use LVCMOS output VCXO.
The VCXO used on the EVK may have 3.3V LVCOMS. So, 1.6V may be used.
Can you let me know why 1.2V bias is used instead of 1.6V?
Best Regards
Sho
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Hi all
I would like to know the following question.
My customer use LVCMOS output VCXO.
The VCXO used on the EVK may have 3.3V LVCOMS. So, 1.6V may be used.
Can you let me know why 1.2V bias is used instead of 1.6V?
Best Regards
Sho
Hi Sho,
When using single ended LVCMOS, we should use XOin+ and bias XOin- to mid supply. CTS VCXO that is used on LMH1983 EVM, has minimum high level of 90% of VCC or 2.97V and maximum low level of 10% VDD or .33V. We can bias XOin- with 1.2V or 1.6V(mid supply) since in either case there is enough swing on XOin+ so we would get a logic high or low level. So either bias should work fine.
Regards,,nasser
Hi nasser san
Thank you for your reply.
Does this device have internal bias voltage?
Please check the attached file.
If so, I think XOin- could not be applied 1.6V.
Best Regards,
Shoquestion.pdf