DS90UB913A-Q1 / Inject Forward Channel Error

Masaaki Sugiyama

Intellectual 530 points

Other Parts Discussed in Thread: DS90UB913A-Q1

Dear support team

I defined Inject Forward Channel Error register.

DS90UB913A-Q1　0x2D[6:0]＝H’03

In this case, we will get three errors of forward channel in Bist mode.

1st error occurs at 1st PCLK, then 2nd error occurs at next PCLK.

Or, are error timings random?

Could you tell me when does the error occur?

Best Regards

Masaaki Sugiyama

over 8 years ago

0 Eric Hackett over 8 years ago

TI__Guru 74252 points

Sugiyama-san,

This thread has been moved to the High Speed Interface forum for more appropriate support.

Regards,

0 Sean Thornton1 over 8 years ago

TI__Expert 5210 points

Hello,

Yes, typically you will see PASS pin go LOW after the 1st PCLK. PASS pin will also go LOW for all consecutive errors that were meant to be sent after initializing error register. This can also be verified in the lab by running the 913A and 914A EVM's in BIST mode.

-Sean

0 Masaaki Sugiyama over 8 years ago in reply to Sean Thornton1

Intellectual 530 points

Dear Sean-san

I'm sorry for the late reply.

Thank you for your kind support.

I will confirm it using EVM.

Best Regards

Masaaki Sugiyama