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Questions about DS80PCIe402 - EQ & Loopback

Other Parts Discussed in Thread: DS80PCI402

Hi,

I have some questions about DS80PCI402 operation.

1. EQ : 

On the table 2(Equalizer Setting), it doens't show the linearify by EQ-8bits setting at 2.5GHz/4.5Ghz.

How to know a EQ value which is not mention at this table? ex, 0x16 etc...

Can you provide the all combination setting from 0x00 ~ 0xFF for the EQ value at 2.5GHz/4.5Ghz condition ? It's not easy to tune a EQ value due to non-linearity characteristic between EQ[0:7] and actual EQ dB.  

2. Loopback :

On the SMBUS mode (LPBK pin is floating), there seems to be showing something wrong the loopback path.

1) Under LPBK pin is floating with Reg0x02[5:4]=00b, it is normal operation like  INA to OUTA, INB-> OUTB. Is it correct?

2) Under Reg0x02 = 10b,  the loop path configuraiton is INBx -> OUTAx. Then, how about the INAx and OUTBx path ?  HiZ?

3) Under Reg0x02 = 01b,  the loop path configuraiton is INAx -> OUTBx. Then, how about the INBx and OUTAx path ?  HiZ?

4) Is there any additional setting(Reg or H/W) needed except on Reg02[5:4] for loopback operation?  Because the output

 

Thank you.

Tony

  • Hi Tony,

    Here are all the combinations up to around ~ 17 dB gain. Many of the combinations are redundant, but may provide a slightly different system response.  I would not expect any settings beyond this group would be needed in a PCIe repeater application.

    EQ Register [7:6] = bst3

    EQ Register [5:4] = bst2

    EQ Register [3:2] = bst1

    EQ Register [1:0] = bst0

     

    bst0

    bst1

    bst2

    bst3

    Pin Setting

    Binary Register Setting

    Hex Register Setting

    0

    0

    0

    0

    00

    0000 0000

    0x00

    1

    0

    0

    0

    0R

    0000 0001

    0x01

    0

    1

    0

    0

    0000 0100

    0x04

    0

    0

    1

    0

    0001 0000

    0x10

    0

    0

    0

    1

    0100 0000

    0x40

    2

    0

    0

    0

    0F

    0000 0010

    0x02

    0

    2

    0

    0

    0000 1000

    0x08

    0

    0

    2

    0

    0010 0000

    0x20

    0

    0

    0

    2

    1000 0000

    0x80

    1

    1

    0

    0

    0000 0101

    0x05

    1

    0

    1

    0

    0001 0001

    0x11

    1

    0

    0

    1

    0100 0001

    0x41

    0

    1

    1

    0

    0001 0100

    0x14

    0

    1

    0

    1

    0100 0100

    0x44

    0

    0

    1

    1

    0101 0000

    0x50

    3

    0

    0

    0

    01

    0000 0011

    0x03

    0

    3

    0

    0

    0000 1100

    0x0C

    0

    0

    3

    0

    0011 0000

    0x30

    0

    0

    0

    3

    1100 0000

    0xC0

    2

    1

    0

    0

    0000 0110

    0x06

    2

    0

    1

    0

    0001 0010

    0x12

    2

    0

    0

    1

    0100 0010

    0x42

    3

    1

    0

    0

    R0

    0000 0111

    0x07

    3

    0

    1

    0

    0001 0011

    0x13

    3

    0

    0

    1

    0100 0011

    0x43

    1

    1

    1

    0

    RR

    0001 0101

    0x15

    0

    1

    1

    1

    0101 0100

    0x51

    2

    2

    0

    0

    0000 1010

    0x0A

    2

    0

    2

    0

    0010 0010

    0x22

    2

    0

    0

    2

    1000 0010

    0x82

    3

    2

    0

    0

    RF

    0000 1011

    0x0B

    3

    0

    2

    0

    0010 0011

    0x23

    3

    0

    0

    2

    1000 0011

    0x83

    3

    1

    1

    0

    0001 0111

    0x17

    3

    1

    0

    1

    0100 0111

    0x47

    3

    0

    1

    1

    0101 0011

    0x53

    Loopback

    Normal operation has the LPBK pin "Floating" this allows INa -> OUTa and INb -> OUTb

    The loopback mode is a test feature and only allows one direction at a time.

    When Loopback is enabled, the straight-through path will be Hi-Z

    It is recommended to use the SMBus registers to control Loopback.

    While using Loopback, the RXDET pin should be pulled to a Logic 1.

    Regards,

    Lee