Hello,
I have an HDMI 2.0 sink application which uses the TMDS181. The initial implementation leveraged a schematic similar to Figure 35/36 in the datasheet.
There are a few things hanging off the DDC bus. They are:
- TMDS181
- EEPROM for EDID
- MOSFET based level translators (required for interfacing to the digital end-point)
Unfortunately, the circuit is failing the capacitance requirement for HDMI certification. I've tried hooking up the circuit like an active cable configuration showing in figure 37 of the datasheet. This configuration leverages the TMDS181 SCL_SRC/SDA_SRC pins.
This works, and I suspect it's because the TMDS181 acts like a buffer. Would you confirm that this is an acceptable use case for a fixed HDMI 2.0 sink application?
Thanks.
Don