Hello,
We have interfaced XIO2001 PCI Bridge(PCIe to PCI) Chip with AM572x processor(custom board). We are using x2 MINI PCI TYPE 3 Connector Form Factor on other (PCI) Side.
XIO2001 is having four interrupt pins INT[A:D], while type 3 Connector which we are using is having only two interrupt pins INT[A:B].
Following is the hardware connection details between XIO2001 & x2 MINI PCI Type 3 Connector, also below is the schematic of XIO2001 and x2 MINI PCI TYPE 3 connectors.
Schematic file -- xio_and_mini_pci.pdf
1) XIO2001 Pin# M6(INT_A) to x1 MINI PCI TYPE 3 Connector Pin#20(INT_A)
2) XIO2001 Pin# N6(INT_B) to x1 MINI PCI TYPE 3 Connector Pin#17(INT_B)
3) XIO2001 Pin# M7(INT_C) to x2 MINI PCI TYPE 3 Connector Pin#20(INT_A)
4) XIO2001 Pin# L7(INT_D) to x2 MINI PCI TYPE 3 Connector Pin#17(INT_B)
Based on the above HW configuration, and our understanding there should be some relation between HW interrupts and interrupt map which is define in dts file ("./arch/arm/boot/dts/dra7.dtsi").