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[TLK10232] Behavior of loopback functions

Takashi Onawa
Genius 13200 points
Other Parts Discussed in Thread: TLK10034, TLK10232

Hi Team,

My customer would like to clarify the behaviors of loopback functions for their board test. According to its datashet, there are 5 register for loopback mode and I didn't understood the difference. Could you tell me the difference belonging to the following questions?

[Registers related to loopback function]
DST_CONTROL_2 register(0x0018), [15 : 14]
LOOPBACK_TP_CONTROL(0x1E.000B), bit 3 (DEEP_REMOTE_LPBK)
LOOPBACK_TP_CONTROL(0x1E.000B), bit 0 (SHALLOW_LOCAL_LPBK)
PMA_CONTROL_1(0x01.0000),  bit 0 (LOOPBACK)
PCS_CONTROL(0x03. 0000), bit 14 (LOOPBACK)

[Questions]
1. Could you tell me the difference between the loopbacks below? (I'm understanding these command are classified as Remote loopback)
- DST_CONTROL_2 register(0x0018), [15 : 14]
- LOOPBACK_TP_CONTROL(0x1E.000B), bit 3 (DEEP_REMOTE_LPBK)

2.  Could you tell me the difference between the loopbacks below?(I'm understanding these command are classified as Local loopback)
- LOOPBACK_TP_CONTROL(0x1E.000B), bit 0 (SHALLOW_LOCAL_LPBK)
- PMA_CONTROL_1(0x01.0000),  bit 0 (LOOPBACK)
- PCS_CONTROL(0x03. 0000), bit 14 (LOOPBACK)

3. In channel change case, "Data Pass Reset" was needed though, Is it also necessary after these loopback commands? 

4. To make the loopback function valid, are there any needed commands?

Regards,

Takashi Onawa

  • 0
    TI__Genius 16150 points

    Hi Takashi,

    1. DST_CONTROL_2 0x1E.00018 bits[15:14] select the source input, if user needs to switch between different sources, for example if channel A needs to select the LS input of channel B, user needs to write '10'. Please take a look into Section 7. Integrated Smart Switch for signal routings.

    DEEP_REMOTE_LPBK. The datapath for this lookpack mode, is as follows: the data is accepted on the high speed side receive SERDES pins (HSRX*P/N), traverses the entire receive data path is returned through the entire transmit data path and sent out thru the high speed side transmit SERDES pins (HSTX*P/N). The low speed side outputs pins are still available for monitoring. In datasheet of TLK10034 Section 5.3.1.17 10GBASE-KR Loopback Modes, you can see the explanation of every loopback mode (we need to add this info to TLK10232 datasheet).

    2. The difference between these register is the mode that you are using, for example if you are using 10GBASE-R (optical medium) you can monitor and control thru PCS registers. On the other hand if you are using copper, control and monitoring are done through Vendor registers.

    3. Once the desired configuration is done, you need to perform a data path reset.

    4. Depending of your setting, if you need the PRBS or you have valid data on the input, medium, among other factors. For example, if you need to perform a loopback with optical cable, you need to select 10GBASE-KR mode, disable link training and auto-negotiation, enable loopback, and that's it.

    I hope this helps.

    Best Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team

  • 0 in reply to Luis Omar Moran
    TI__Genius 13200 points
    Luis-san,

    Thank you for your quick response.

    My customer want to loopback external PRBS signal through HSRX-HSTX root. They try to do it by using Deep_Remote_loopback mode, But they got 100% bit error by the BER test. According to the engineer, he can see a good eye diagram on TX side but BER is pritty bad.

    Isn't TLK10232 able to loopback external PRBS signal properly?

    I'm guessing PCS/PMA function for 10G-KR might affect someting to the external PRBS signal in the device though, Can we set the loopback pass before 64b/66b decoder? Or can we set PCS/PMA function off somehow.


    Regards,
    Takashi Onawa
  • 0 in reply to Takashi Onawa
    TI__Genius 16150 points
    Hi Takashi-san,

    What kind of pattern are using?

    How are you connecting the HSRX and HSTX? Through copper or optical cable? If you are using optical cable, please try another settings for HS_SERDES_CONTROL_2 & HS_SERDES_CONTROL_3.

    Best Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • 0 in reply to Luis Omar Moran
    TI__Genius 13200 points

    Hi Luis-san,

    >What kind of pattern are using?

    10.3125GHz, PRBS31 from BER measurement instruments

    How are you connecting the HSRX and HSTX? Through copper or optical cable? If you are using optical cable, please try another settings for HS_SERDES_CONTROL_2 & HS_SERDES_CONTROL_3.

    They might be using optical cable, let me check. But they have seen good eye diagram in the test, so it doesn't make sense at the points for me. Is there any possibility that the PRBS pattern  was modified in the root of loopback?   

    I think the PRBS31 data is de-scrambled by 64b66b decoder at HS RX block on the block diagram above. Since 10G KR protocol’s  preamble only allows "01b" as valid data, bitstream which contains other preamble might affect something by the PCS/PMA block.

    Regards,

    Takashi Onawa

  • 0 in reply to Takashi Onawa
    TI__Genius 16150 points

    Hello Takashi-san,

     Is important to mention that in deep remote loopback mode, the the LS serial transmitter is internally connected directly to the LS serial receiver. This short, low-loss interconnect will have different properties than a typical PCB interconnect, so different transmit and receive link settings should be used to optimize BER. Hence, they should try with different settings for HS_SERDES_CONTROL_2 & HS_SERDES_CONTROL_3.

    Thanks,

    Luis

  • 0 in reply to Luis Omar Moran
    TI__Genius 13200 points

    Luis-san,

    Thank you for explaining about the point which they need to take care in Deep Remote loopback mode.

    I understood HS_SERDES_CONTROL_2 & HS_SERDES_CONTROL_3 should be set appropriately base on that PMA/PCS block in the TLK10232 doesn't affect  PRBS bitstream at all. And the same PRBS signal bitstream should be returned from HSTX.

    Is this understanding correct? You mean that they should see the same PRBS bitstream on HSTX if they set HS_SERDES_CONTROL_2 & HS_SERDES_CONTROL_3  appropriately, don't you?

    Regards,

    Takashi Onawa

  • 0 in reply to Takashi Onawa
    TI__Genius 16150 points

    Hi Takashi-san,

    You are right, if they set SERDES settings, they should see the same PRBS bitstream on  HSTX*P/N. Attaches you will find a brief guide of how to set these registers. I hope this helps.

    TLK10034_link_training_app_note.doc

    Regards,

    Luis

  • 0 in reply to Luis Omar Moran
    TI__Genius 13200 points
    Luis-san,

    Sorry, I didn't make sure to pass PRBS generated from external instruments.
    Could you show me a expample macro for that?

    I would like to clarify registers should be configurated for the PRBS pass.

    I got a TLK10232 EVM last week, so I can verify the macro tomorrow.

    Regards,
    Takashi Onawa
  • 0 in reply to Takashi Onawa
    TI__Genius 16150 points

    Hi Takashi-san,

    Attached you will find a document with different procedures to start-up the device. Please take a look.

    6765.tlk10232_BringupProcedures_v2.pdf

    Thanks,

    Luis

  • 0 in reply to Luis Omar Moran
    TI__Genius 13200 points

    Luis-san,

    I quickly read through the document  today but the all procedures in the documents looks using internal pattern generator and valification for the loop back test.

    As I mentioned some times before, my customer hopes loopback PRBS generated from external instruments.

    It is really possible to pass PRBS through TLK10232 deep remote loopback root, isn't it?

    Let me ask again just in case.

    Regards,

    Takashi Onawa

  • 0 in reply to Takashi Onawa
    TI__Genius 16150 points
    Hi Takashi-san,

    Yes, theoretically the deep remote loopback should work with this setup. Basically, this kind of loopback just route the low speed side (internally), hence, you shouldn't have any issue.

    Refer to the BringUp Procedures doc for tlk10232.
    "KR with Auto Negotiation, Link Training, HS Test Patterns, with 156.25 MHz /
    312.5 MHz Refclk"

    Here it mentions that after aneg and lt are complete, that you can enable the HS test patterns by either the Vendor Specific Test Patterns (prbs 31, 23 or 7 available) , or the KR Standard test patterns (prbs 31 available). I know we had a hook in place so that when these patterns are running, you won't lose block lock and go back to AutoNeg. But I don't know if that hook is in place for the Vendor Specific (30.x) registers or just the KR Standard registers (3.42). Hopefully it's both. I can dig through code if you need to know, or maybe the KR Standard register is sufficient since you can do prbs 31.

    Regards,
    Luis