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LMH1983 FVH Timing Requirement

Other Parts Discussed in Thread: LMH1983, LMH1981

Recently, when I use FPGA to generate FVH info for LMH1983, sometimes the chip can't recoganize some input formats after re-compiling the project. The related code is exactly identical therefore I guess probably it is caused by the timing difference between FVH signals.

I searched LMH1983 datasheet and I didn't see any info about the timing requirement for these three signals. Can I find the spec?

BTW, all the registers of LMH1983 are configured by the default values, no any operation on it. And currently all the FVH info are extracted from the SDI F/V/H bit (altered at EAV) directly. 


Plus, I also notice that, sometimes if the LMH1983 can't recoganize certain format, it is dead forever unless I re-power the chip (I didn't try software reset the chip since currenlty no I2C host is available). What could be the reason?

Thanks

  • Hi,

    Can you provide some more information to help us understand the issue?

    1. Since it looks like only some formats are not recognized, can you specify which formats are not working for you?

    2. What VCXO and loop filter capacitors are you using? The choice of these components are important to ensure timing stability, and I wonder if this could be related to the format recognition issues you are experiencing.

    3. What type of timing specs are you looking for?

    4. Is there a way for you to obtain I2C access to the device. I would like to know if the LMH1983 is entering an unknown state when it is unable to recognize the input format that is causing you to require a power-on reset to get the device working as expected again.

    Thanks,

    Michael

  • Hi Michael,

    Thank you for the help. Here are the info for the questions.

    1. The problem doesn't happen constantly on specified format, sometimes it is SD or sometimes it is HD. Now, it seems more easy to happen for 1080i/59.

    2. I think the circuit is stable because it is used on other products as well, and it works fine for detecting all formats. Therefore, I guess probably the current issue is caused by the inappropriate signal timing from my current FPGA codes.

    3. I am looking for the spec to specify the timing tolerance among F/V/H signals, and the appropriate length duration of FVH signals for different video formats.

    4. Sorry, currently there is no easy way to access the LMH1983 via I2C, unless I developed an I2C host in FPGA.

  • Hi,

    1). Please take a look at LMH1981 data sheet regarding HVF timing of 1080i and other formats.

    2). Since format detection is working on other products, it is a good idea to put your scope on HVF of LMH1983 on these other products so you can duplicate the same timing on your FPGA or the board you are having problem with.

    Regards,,nasser

  • Thank you for the info. Will follow LMH1981's spec.