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DS125DF1610 - Can you recommend for SDI application ?

Guru 19785 points
Other Parts Discussed in Thread: DS125DF1610, LMH1218, LMH1219

Hello Team,

Our customer is planning to use DS125DF1610 for SDI application. Can you recommend using this device for this application ?

I am not sure if this device could handle pathological pattern which used in SDI application.

Could you please give us your advice ?

Thanks in advance.

Best Regards,

Kawai

  • Hi Kawai-san,

    The DS125DF1610 cannot be used for SDI applications due to the presence of internal on-chip AC capacitors. This will prevent the EQ pathological from passing through correctly.

    Regards,

    Michael
  • Michael-san,

    I wonder if you can give us an alternative solution for this request?

    1. Are there any alternative devices which support this application?
    2. Isn’t it feasible to bond out the on-chip DC block cap?
    3. Can you study on an additional encoder which may scramble the pathological data
    such as 20b22b encoder etc. with minimal logic complexity.?

    Mita

  • Hi Mita-san,

    1. How many channels are you searching for regarding your application? Does it need to be a 16-channel reclocker device?
    2. Yes, it may be possible to bond out the on-chip DC block cap, but this would require a new silicon design, which is a essentially a new product release. While feasible, the change will still be significant, and we do not have the resources to support at this time.
    3. Can you disclose more about what you need the scrambling for? In our devices so far (such as the LMH1219 and LMH1218), we do not perform additional encoding, scrambling, or randomization, so it would be helpful to know what the end use case is for.

    Regards,

    Michael
  • Michael-san,

    Thank you or your prompt feedback.

    Item #1: The main reason of using DS125DF1610 is to implement 4x4 cross point switch
    for 6G bps SDI data stream.

    Item #3: If 20b22b can be easily implemented with FPGA, it may be an option.
    The 20 bit is suitable for handing 20 bits video data with 10% of overhead
    as long as it secure the robust data transfer through the on-chip small DC
    block cap. If it is true, I wonder if you can provide FPGA IP?

    Mita