When following the section 4.3 procedure in the TPS65982D Firmware document, All 4CC commands are first confirmed passing using the CMD1 register, then confirmed using the output inside DATA1. Upon "successful completion" (as confirmed output of PTCc command) most of I2c registers (I think all except 4cc registers) has all bytes set to 0x00, including register length byte.
The PTCq to query the status of the patch process returns the following 15 bytes:
0x00::0x01::0x02::0x00::0x00::0x00::0x00::0x00::0x0f::0x00::0x00::0x05::0xb1::0x00::0x40
Byte 2 is set to 0x01, which, according to documentation, means that patch state machine is in "Loading" state. The PD Controller seems to stay in this state indefinitely.
Can you help on the cause and a solution for this issue?