We need to use synchronous writes to disk using the TUSB9261 - that is writes that bypass os and possibly disk caching to make sure data is written to disk in case of power failure or other bad events.
We understand it has a performance impact, however using the TUSB9261 it is huge.
Cached writes : 165MB/sec
Sync writes : 12MB/sec
Our previous PCB design was using competitors bridges ICs, that also suffered some perf impact, but not so much :
Cached writes : 155MB/sec
Sync writes : 65MB/sec
The tests were done using the same hard drives and software install, just the bridge and hub have changed to TI brand.
Those are real application figures, raw sequential IO perform a bit better, in the range of 45-55MB/sec.
Application runs under linux, FW is 1.05.
Do you have some details on the impact of sync writes handled in by firmware ?
(I actually suspect the competitor IC was not honouring the sync write completely)