I'm using the DP83848YB Ethernet phy .
Is not clear in the data sheet if the CLK_OUT (PIN#25) clock output signal is available when the device is in power down mode [PWR_DOWN/INT (PIN 7) is active low ] ?
What is the power down mode in details ?
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I'm using the DP83848YB Ethernet phy .
Is not clear in the data sheet if the CLK_OUT (PIN#25) clock output signal is available when the device is in power down mode [PWR_DOWN/INT (PIN 7) is active low ] ?
What is the power down mode in details ?