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Decoupling Caps on High Speed devices

Other Parts Discussed in Thread: OMAP5910

I recently came across a somewhat older paper entitled "OMAP5910 Decoupling/Filtering Techniques" (SPRA906 dated April 2003) which has some decent information regarding the calculation of the decoupling caps on a device to prevent excessive noise/radiation. In it the total decoupling capacitance is calculated for this specific processor and then it is suggested that the capacitor(s) be selected with a self-resonant frequency at approximately the core clock frequency (in this case the core was operating at 150MHz). Shouldn't that be at the edge rate of the clock, rather than the clock frequency? 

  • Hi Richard

    High speed device requirements can vary significantly with regards to decoupling.  Looking at apps notes and the device datasheet are good places to start the decoupling design process.  Many of our high speed interface devices are built with BiCMOS circuits and have very minimal decoupling needs.