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SN75DP130 Aux Monitoring

Other Parts Discussed in Thread: SN75DP130

Hi,f

I am trying to modify a vhdl design which was not supposed to have SN75DP130 between the fpga's transceiver and the sink to a new daughterboard that uses the SN75DP130.

1. The design does not work as is and I assume that it has to do with the SN75DP130 - am I wrong and the SN75DP130 is designed to work also in a transplant way?

2. I read that the SN75DP130 "monitors" the Aux communication and corrects the swing+emph on its own and hence I should keep the transceiver's voltage attributes constant. My question is: how this is actually done - do I have to still conduct the aux-based i2c communication asking the sink about its input signal's quality (i.e., the link training) without doing much about its answers yet still ask until an OK is obtained? or does the SN75DP130 asks and operates on its own? Basically I am asking how the monitoring works is the SN75DP130 a pure listener not interfering in the aux conversation - or does it initiate the training part related to the signal strength?

Thanks!

  • Hi Raanan,

    What the failure you are seeing? is it signal integrity related or the device is not working at all? This device is intended to be as transparent as possible.


    This is how link training works:

    source and sink will conduct link training where data rate, the number of lanes,  Vod and PE is selected.

    DP130 will monitor AUX channel to configure itself, it will copy the configuration that is selected through AUX.

    It just mimics data rate, the number of lanes,  Vod and PE, it doesn't conduct link training, it just monitors.

    DP130 has automatic EQ, which will compensate for the losses between DP source and DP130.

    For Automatic EQ, there are two ranges to select, or you can set a fixed EQ via I2C.

    Could you share schematic and layout for review?

    Regards