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DP83822 LED_1 set as SD

Francois Champoux
Prodigy 100 points
Other Parts Discussed in Thread: DP83822IF

We have started a 100BASE-FX design using the DP83822IF PHY. I need the PHY to read the Signal Detect (from the Avago transceiver) on LED_1 pin.
There is no indication in the DP83822 specification concerning the detection levels on this pin. Is it PECL compatible?

  • 0
    TI__Mastermind 23675 points

    Hi,

    Signal Detect pin is CMOS. The DC parameters in the datasheet hold true for this pin.

    Kind regards,

    Ross

  • 0 in reply to Ross Pimentel
    Prodigy 100 points

    Hi Ross,

    we have continued the bring-up of our system using the DP83822 in 100BASE-FX mode.

    The communication is now reliable, but there is a problem with Link Detection.

    To debug, we monitor BMSR at regular intervals.

    Here is what happens when we connect to an external transceiver.

    1 - Out of reset, with no fiber attached,  the BMSR will show 0x7849 as expected (No Link).

    2 -If we insert the RX fiber, Signal Detect is activated but nothing changes. Still 0x7849 (No Link).

    3 - Then we connect the TX fiber. The register then shows 0x784D (Linked).

    4A - If I disconnect the TX fiber, the register becomes 0x7849 again.

    4B- If instead I disconnect the RX fiber, Signal Detect is deactivated but nothing happens and I still read 0x784D.

    It looks as though the DP83822 only uses Far End Fault from the remote device to determine if there is a link or not. Is this the case?

    Is there something I can do to make the DP83822 see the Signal detect input correctly, so it can also send Far End Fault signals?

    Here is how we have strapped the PHY:  0x467 reads 0x4503  and 0x468 reads 0x0001.

    - I don't know how to configure the EEE_EN strap. Should it be enabled or not?

    - Also, the LED_1 configuration strap has been set to Tri-State. Is this OK?

    Thanks!

  • 0 in reply to Francois Champoux
    TI__Mastermind 23675 points
    Hi Francois,

    Please confirm you are trying to operate in RGMII mode.
    From the register reading it shows you to be in RGMII based on RX_ER bootstrap.
    Also, for enabling the signal detect pin, please strap to MODE 3 for RX_ER bootstrap to enable Signal Detect in FX mode and to have RGMII operation. There was a mistake in the datasheet (a change is underway to resolve this) since the description is not correct. MODE 3 and MODE 4 will be Signal Detect Enable and not Disable.

    Best regards,
    Ross
  • 0 in reply to Ross Pimentel
    Prodigy 100 points
    Hi Ross, good to hear from you.
    I modified the strapping of RX_ER to mode 3, since I'm using RGMII.
    The good news is that the LED_1 pin is now an input, regardless of its strapping on CRS.
    However, the link indication in the BMSR always reads 0x7849, whether or not the fibers are connected., and whether or not CRS is strapped to mode 1 or 2.
    Are there other settings to try?
    Or, should I read Signal Detect in another register?

    Best regards!
  • 0 in reply to Francois Champoux
    TI__Mastermind 23675 points
    Hi Francois,

    Can you have a look at the signal detect polarity using register 0x465h bit[0]?
    Try setting bit[0] to both 0b0 and 0b1.

    Best regards,
    Ross
  • 0 in reply to Ross Pimentel
    Prodigy 100 points
    Hurray!
    It works! The polarity has been incorrectly documented in the spec.
    We have an active HIGH Signal Detect and it works with bit 0 of 0x465 left at 0.
    Thanks for your precious support.