SN65DSI86: SN65DSI86 related questions

Hi,

My customer connect MIPI signals from their CPU to SN65DSI86 directly, and have questions as below.

• They're asking if they should implement 0.1uF cap (ac coupled) at the input of DAx/DBx signals as MIPI inputs (as below.) I don't think they should implement this, can you help to confirm it? Or they should implement them close to CPU side.

• They need to support eDP with resolution as 1920 x 1280 and the frame rate is 60fps. Do they need to use dual channel of MIPI or single channel is enough?

Thanks!

Antony