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DP83867IR: Phy link establishment issue for 2-ports on the same board

Zhou Fang67
Expert 4250 points
Part Number: DP83867IR

Hi Expert,

We are using 2 DP83867 on the board and doing connection test, there is an issue that is confusing. 

Test set up:

PCB1: 2 PHYs with DP83867, port 1A and 1B.

PCB2: 2 PHYs with DP83867, port 2A and 2B.

Results:

Port 1A connected Port 1B, LED0 Off, LED1 Off, no connection, 2 ports on the same PCB cannot establish connection to each other after power up.

After Port 1x connected to 2x, once the port on PCB1 is connected to PCB2 successfully, the ports on the same board can establish the link to each other without any issue(Port 1A connected Port 1B LED0 On, LED1 On, Ping Good)

PHY on PCB1 always establish successful link with PCB2.

Port 1A connected Port 2A, LED0 On, LED1 On, Ping Good.

Port 1A connected Port 2B, LED0 On, LED1 On, Ping Good.

Port 1B connected Port 2A, LED0 On, LED1 On, Ping Good.

Port 1B connected Port 2B, LED0 On, LED1 On, Ping Good.

Is there any notification for the different PHY with the same DSP/FPGA that may cause this problem?

Thanks.

Zhou

Zhou

  • 0
    TI__Expert 4250 points

    Hi Expert,

    We captured the register reading

    In both situation, PHY enable auto-negotiation. However, Manual Master/Slave Configuration fault detected pop up for failure case. 

    Master/Slave Configuration has been disabled, the fault is not supposed to appear?

    Should we restart Auto-negotiation to fix the issue?

    Register reading without Ethernet established.

    script.txt file is open...

    Register 0000 is: 1140

    Register 0001 is: 7949

    Register 0002 is: 2000

    Register 0004 is: 01E1

    Register 0005 is: C1E1

    Register 0006 is: 006F

    Register 000A is: 8C00

    Register 0010 is: 5048

    Register 0011 is: 1302

    Register 0009 is: 0300

    Register reading with Ethernet established.

    Register 0000 is: 1140

    Register 0001 is: 796D

    Register 0002 is: 2000

    Register 0004 is: 01E1

    Register 0005 is: C1E1

    Register 0006 is: 006F

    Register 000A is: 3C00

    Register 0010 is: 5048

    Register 0011 is: BD02

    Register 0009 is: 0300

    Thanks a lot.

    Zhou

  • 0 in reply to Zhou Fang67
    TI__Mastermind 23675 points
    Hi Zhou,

    Can you disable Auto-MDIX on either 1A or 1B and then do the same tests?
    I believe what could be happening is that during link-up, the Auto-MDIX feature have the same polynomial configuration and what is occurring is the channels are switching back and forth at the same time. This is causing the link to never resolve. Since you are timing the bring-up perfectly when connecting two phys on the same board, you are seeing this. If you disable Auto-MDIX for one of the 2 PHYs, this lock-up should not occur.

    Kind regards,
    Ross
  • 0 in reply to Ross Pimentel
    TI__Expert 4250 points
    Hi Ross,

    You mean disable Auto-MDIX by using strap or register configuration? Does this setting have any compatible issue when the PHY needs to be connected with other board.

    I tried to "Restart Auto-negotiation" or "Reset" by using register 0x0000 for one of two PHYs. The link between them will be established after register was written.

    Thanks a lot.

    Zhou
  • 0 in reply to Zhou Fang67
    TI__Mastermind 23675 points
    Hi Zhou,

    There is no issue in disabling Auto-MDIX, however it will prevent you from being able to auto detect the TD and RD pairs.
    The reason why I suggested you disable Auto-MDIX is because you are trying to connect two PHYs on the same board together. This does not seem like your end application and more of a board level check. Because of that, disabling Auto-MDIX for that test will not have an effect on your system. I suggest doing it in software, that way when you either reset, power-down or software config, the setting will go back to enabling Auto-MDIX.

    Also, like you found, you can just reset one of the PHYs and this will also solve the issue. I suggest you then just go with this approach.

    Kind regards,
    Ross
  • 0 in reply to Ross Pimentel
    TI__Expert 4250 points
    Hi Ross,

    What is the mechanism behind this? Why the DP83867s on the same board is potentially latched up?
    If they are on the different board, latched up would not appear due to different timing?

    Thanks a lot.

    Zhou
  • 0 in reply to Zhou Fang67
    TI__Mastermind 19780 points
    Hi Zhou,

    Are you using the same reference clock for both DP83867s on the same PCB? There is a chance that auto-mdix lockout is occuring due to the timer used for auto-mdix.

    If your 2 DP83867 ports are running synchronously to each other, this could occur.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    TI__Expert 4250 points
    Hi Rob & Ross,

    They use the different clock from the same clock buffer & oscillator.

    Bit5&6 from register 0x0010 is "RO: read only", however, I can still write Bit6&5. Whether Bit5&6 are RW register instead of RO?

    When MIX_CROSSOVER is changed from Auto Crossover to Manual MDI_X configuration, the link establish successfully.

    Thanks a lot.
    Zhou
  • 0 in reply to Zhou Fang67
    TI__Mastermind 23675 points
    Hi Zhou,

    I believe that you have reached out to us over email and that this link issue has been resolved.
    I will close this thread.

    In regards to register 0x0010, I believe this is a typo.
    Thank you for the catch.

    Kind regards,
    Ross