DS90C385A: DS90C385A application question

Hi Wen,

Thanks for your patience and sorry for our delay as we were out for the New Year Holiday season.

1. The DS90C385A will serialize parallel LVTTL/LVCMOS data at the input into LVDS at the output, according to the OpenLDI specification, whereby 7 LVTTL/LVCMOS bits are serialized onto one LVDS data pair. In total, there are 4 pairs of LVDS data and 1 pair of LVDS clock. This all occurs automatically, assuming that you provide a valid clock signal at TXCLKIN.

2. Supported resolution depends on whether the required pixel clock frequency is within the DS90C385A PLL lock range (minimum 18 MHz). To determine the pixel clock frequency, you can refer to the datasheet of the display or processor. Alternatively, you can make a rough estimate of the pixel clock frequency as detailed in Section 8.2.2.2 of the DS90CR286A datasheet.

3. The DS90C385A is agnostic to the source type. All that is required is that you provide a valid LVTTL/LVCMOS signal to the parallel inputs alongside a valid clock signal in accordance to the datasheet specification.

4. Yes, the DS90C385A can serve as a replacement for the THC63LVDM63A. However, it seems like the Thine device only uses 18 bit color instead of 24 bit color. To find a closer match to the TH63LVDM63A, I suggest taking a look at the DS90C365A.

Thanks,

Michael