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DS90CR286A: Using DS90CR286A to convert Camera Link signal to parallel video

Dan P
Prodigy 90 points
Part Number: DS90CR286A
Other Parts Discussed in Thread: FLINK3V8BT-85, , DS90CF386

I'm trying to assess whether the above part would be capable of converting a Camera Link Base signal to parallel. Do I need any additional electronics, or can I basically plug the Camera Link output directly into the pins on this chip and have parallel video come out? Basic camera specs: 320x256 @ 30FPS, 12 bit output, 20.75MHz clock.

Followup - would the receiver half of the FLINK3V8BT-85 perform this function?

www.ti.com/.../flink3v8bt-85

Thanks!

  • 0
    TI__Mastermind 29655 points
    Hi Dan,

    Yes, the DS90CR286A can be used for converting Camera Link Base (serialized 4 LVDS DATA + 1 LVDS CLK) to the coresponding 24 bit + 3 control signals parallel output. There are no additional electronics needed to perform this conversion.

    I am curious about the 12-bit output. I typically am used to seeing RGB565, RGB666, or RGB888, so I wonder if the camera is still performing RGB888, or this is some form of RGB444 at double the data rate than if the camera had a 24-bit output? In either case, as long as the output strobes on a single clock edge (not DDR) and you can assure that the LVDS clock going into the DS90CR286A is within the PLL lock range (20-66 MHz), this application should work.

    Thanks,

    Michael
  • 0 in reply to Michael Lu (Santa Clara)
    Prodigy 90 points

    Thanks Michael. Could I use the receiver half of the FLINK eval kit to prototype the connection?

    http://www.ti.com/tool/FLINK3V8BT-85

    The camera we're trying to interface to is a short-wave IR one:

    Dan

  • 0 in reply to Dan P
    TI__Mastermind 29655 points

    Hi Dan,

    I looked at the camera specifications and reviewed the 12-bit Base Camera Link, and I believe that you should be able to use receiver half of the FLINK3V8BT-85 inputs as a prototype, seeing that the CameraLink Serializer is already built into the camera:

    Please note that the DS90CF386 on board the FLINK3V8BT-85 strobes the output parallel data on the clock's falling edge. If you wish for a similar receiver device that strobes on the rising edge, I recommend looking at the DS90CR286A.

  • 0 in reply to Michael Lu (Santa Clara)
    Prodigy 90 points
    Thanks Michael, this is excellent. I really appreciate your help. Does the RxCLK OUT line allow us to set the output rate of the deserializer? With each strobe on RxCLK, a new pixel worth of data is presented?
  • 0 in reply to Dan P
    TI__Mastermind 29655 points
    Hi Dan,

    The RXCLKOUT will output the clock frequency detected by the PLL from the LVDS RXCLKIN, so there is no way to set a new output rate for the deserializer.

    With each strobe of RxCLKOUT, the deserializer output will simultaneously be sending 4 bits Red, 4 bits Green, 4 bits Blue, HSYNC, VSYNC, and DE in parallel. It is fair to assume that this is a "new pixel's worth" of information.

    Thanks,

    Michael
  • 0 in reply to Michael Lu (Santa Clara)
    Prodigy 90 points

    Thanks Michael. So with each pixel clock, we'd get a new set of data on the lines, which means we need to sample at 20.75MHz for this particular camera.

    Really appreciate the help.

  • 0 in reply to Dan P
    TI__Mastermind 29655 points
    Hi Dan,

    Your assumption is correct.

    For future reference, a quick "back-of-the-envelope" calculation to confirm this is to consider that the pixel clock is estimated by the following:

    [Active Pixel Length] x [Active Pixel Width] x [Frame Rate] x [Estimated Blanking Interval Factor] ~ Pixel Clock Frequency

    The blanking interval factor varies from display to display, so unless we look closely at the datasheet, it's usually safe to assume a conservative 1.1x or 1.2x as a factor. In modern displays and cameras, the blanking interval factor tends to be less than 1.1x.

    Looking at your display, we can estimate the following:

    640 x 512 x 60 fps x 1.1 = 21.63 MHz, which is in the neighborhood of the 20.75 MHz required.

    Thanks,

    Michael