We have two DP83848H with separate I/O except they share a common MDC/MDIO. Unfortunately, neither have pulling/strapping resistors on the PHYAD pins, thus at power-on they have the same address.
The datasheet states the address is set after hardware reset RESET_N is pulsed low for > 1uS.
Can the address be set by holding RESET_N low, then driving the address onto the RXD[] pins, releasing RESET_N and putting the RXD[] pins back to receive mode.
The reset timing diagram 8.2.2 does not state the hold-time necessary for PHYAD after reset is deasserted.
We are concerned the PHYAD pins will transition to output drivers before we have returned the RXD[] pins to inputs, thus both will be driving at the same time.
1. Is the hold-time available
2. Has anybody had success programming the PHYAD this way?
Thank you, Roland
