This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCA9306: [ PCA9306 ] Support Clock Stretching? and Power Sequence

Part Number: PCA9306

[ PCA9306 ] Support Clock Stretching? and Power Sequence

Hi there,

Do I need to consider whether PCA9306 support the clock stretching or not?
My customer would use PCA9306 for their design which need to support the clock stretching.
Should I suggest customer to use other device with clock stretching support?

Also, in my customer system (similar to Fig. 7 below), Vref1=1.8V ramp up first (before Vdpu=3.3V ramp).

When Vref1=1.8V is powered-on and Vdpu=3.3V is off, it's assumed that EN is high-z state.
Do you think that this situation cause any of problem?

My customer is concerned that the unexpected voltage is appeared on Vdpu side through PCA9306.

Thank you for your support in advance.
Regards,
Ken

  • Hello Ken,
    The PCA9306 does support clock stretching. It is a simple level shifter and both channels are identical. It is not a buffer so please consider whether you need a buffer due to capacitive loading.

    The situation you described above is correct and should work as intended. This part only passes the LOW state and the high state is determined by the Vdpu no each side.
    -Francis Houde
  • Hi Francis,

    Thank you for your support, it's clear and helpful for me.

    Thanks,
    Ken