Hi,
Customer has a technical query for the XIO2001 chip regarding the power on and power off sequence.
Power Up sequence:
The power up sequence Page 22 (figure 4), shows REFCLK being applied after nGRST is released and before nPERST is released.
What would be the impact of REFCLK running prior to the release of nGRST other than non-compliance to the PCI Express specification? i.e. would there be any functional impact?
Power Down sequence:
The power down sequence page 23 (figure 5), shows REFCLK being removed prior to VDD and VDDA being removed.
What would the impact of REFCLK being removed concurrent with VDD and VDDA being removed? i.e. would there be any functional impact?
Thanks,
Jani
