• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 34 subscribers
  • Views 624 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMH1983: PLL lock time in Free Run mode

Kikuo Mita
Intellectual 2515 points
Part Number: LMH1983

Hi Team,

Please advise me no the questions bellow.

Q1　 How long does PLL1 take to assert LOCK when it is configured in Free Run mode.
　　When I measured PLL1 lock time in Gen Lock mode without reference input, it too
　　about 5.5 seconds.
　　I want to shorten the LOCK time by setting the device in Free run mode.

Q2. 　How long do PLL2, PLL3 and PLL4 take to get locked to the PLL1?

Mita

  • 0
    TI__Mastermind 32575 points

    Hello,

    A1.  Free-run mode means PLL1 is open loop, which is similar to Genlock mode without any ref input.  So free-run mode should not affect lock time.  The only way to reduce lock time is to widen the PLL1 loop bandwidth through the PLL1 external loop filter components and PLL1 charge pump settings.

    A2. PLL2 to PLL4 have much wider bandwidth and should stay locked to PLL1 VCXO frequency (27 MHz) regardless of whether PLL1 is in free-run mode or genlock mode.  Since PLL1 is a much slower loop, PLL2 to PLL4 can track it.

    Alan

  • 0 in reply to Alan O
    TI__Intellectual 2515 points
    Thank you for the answer.

    Mita