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DS110DF1610: HEO/VEO values for error free

Toshiyuki
Mastermind 7075 points
Part Number: DS110DF1610
Other Parts Discussed in Thread: DS125DF1610

Hi,

Customer would like to confirm HEO/VEO values for error free. Regarding HEO, in case input jitter tolerance is >0.7UI like DS125DF1610 datasheet, do we judge HEO must be more than 0.3UI ? Meanwhile, how do we consider the margin for VEO?

Condition;

・Adapt mode 0 - CTLE only

・Data Rate - CPRI and 5Gbps

Best Regards

Toshiyuki

  • 0
    TI__Mastermind 29655 points
    Hi Toshiyuki-san,

    Unfortunately, there is no exact amount of HEO or VEO eye opening where error-free operation is guaranteed. The HEO and VEO should be used simply as a way to quantify whether the CTLE has been tuned optimally. This is done by reading back HEO or VEO after adjusting the CTLE to see if the eye opening is maximized. Therefore, HEO and VEO readback should be treated as a diagnostic tool, where your endpoint (ASIC or FPGA) determines error-free operation.

    In general, an eye opening of at least 0.3 UI HEO and at least 200 mV VEO imply that there will be a good opportunity for the DS125DF1610 to retime the signal error-free. However, again, there is no specific value of HEO or VEO that ensures error-free operation.

    Thanks,

    Michael