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DS91M040: Will all I/O Be tri-state when MDE is de-asserted?

Part Number: DS91M040

Support Path: /Product/Development and troubleshooting/Help with board layout or design considerations/General layout tips/

We are incorporating this device in a new design where multiple devices are on the same bus.   We'd like to be able to de-assert MDE, but keep the LVD AND LVCMOS interface active for other devices.

My concerns:  When MDE is de-asserted, do all the interface safe operating voltages still apply?  (Sometimes powerdown mode is intended for only a sleeping system...Ours will still be active)

                         Will the LVCMOS outputs be tri-state?  e.g. if we assert RE0n with MDE de-asserted, will RO0 be tristate so we can share this signal with another device?  

                          And LVD will be in high-impedance state?

Thanks,
Tony

  • Hi Tony,

    The datasheet is recommended to set DE = L to put outputs in high impedance state. Please see the truth table on page 11 of the datasheet. When MDE is L, the device overrides all other control and powers down. It’s recommended to follow the DS91M040 datasheet.

    We can look at it on the EVM setup if necessary.

    Thanks,
    Dennis