DP83867IS: DP83867 for SGMIII

Hi Lucifer,

A few points on your schematic:

Strap requirements for the RX_CTRL pin have been updated. Please review the new SNLS504A datasheet. Mode 3 or mode 4 should be selected for this line.
SGMII should also be strapped as enabled using the LED_0 pin.
C285 and C286 should be placed close to the transmitter, in this case your 4G module.
C287 and C288 should be located close to the DP83867
The load capacitors look too small for your crystal. See this thread for crystal load capacitor calculation: e2e.ti.com/.../478767

Best Regards,

Dear Sir,

your suggestion of "SGMII should also be strapped as enabled using the LED_0 pin."
do you mean I have to strap LED_0 as enabled just like mode 4, right? Thanks.

http://www.clouding.com.tw/other/core.jpg

Hello Lucifer,

Strapping LED_0 in mode 4 will enable SGMII and MIRROR mode. From your schematics, MIRROR mode should not be enabled. LED_0 should be strapped to mode 2 in this case where SGMII is enabled and MIRROR mode is disabled. LED_0 will have a 10K pull-up and 2.49K pull-down. LED_0 will be a active high driver, so the LED should be connected between LED_0 pin and GND with a current limiting resistor.

-Regards,
Aniruddha

Dear Sir,

what you mean just like figure below , right? Thanks.

Hi Lucifer,

Yes but the transistor is needed only for 1.8V VDDIO configuration. If your application uses 2.5V or 3.3V VDDIO then transistor on LED is not required. You can connect the LED between LED pin and ground with a current limiting resistor

-Regards,
Aniruddha

Dear Sir,
Appreciate for your help. I update the picture above. please check again , if there is no any issue. I am planing layout , Thanks.

Hi Lucifer,

I apologize for the confusion but I would suggest keeping the transistor because it provides some gate/base isolation between the LED path and the bootstrap. Without the transistor, it will be very difficult to control the strap voltage, which is required to ensure proper configuration.

I suggest you keep the original image with the transistor included for mode 2.

Kind regards,
Ross