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SN65DSI84: dual link clocks

Eric Steimle
Expert 2290 points
Part Number: SN65DSI84

In dual link mode are clock a and clock b guaranteed to be synchronous to each other?  In other words can I clock all 8 data lanes off of just clock a and ignore clock b if I want to?

  • 0
    TI__Mastermind 18655 points

    Hello Eric,

    Theoretically, the CLK distribution should be nearly identical between two LVDS interfaces since both LVDS CLKS are generated from one CLK source so they are the same between two as the datasheet says. The skew is possible due to other mismatches but should not be greater than 10ps.

    Regards,

    Joel