• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 32 subscribers
  • Views 465 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS32EL0421: Expected Jitter on output / Max Input Clock Jitter

Amanda Ross95
Intellectual 2740 points
Part Number: DS32EL0421

Hello there,

For the DS32EL0421, what happens to the jitter on a ~300MHz input clock at the data output which is operating at 3.125Gbps? Does the jitter pass through unattenuated or is it increased?  For instance, say I have 10pSec of jitter on the ~300MHz clock, then what is the jitter on the 3.125Gps output data?

One more question, the datasheet for the DS32EL0421 discusses device performance related to excessive input clock jitter.  Is there a spec for what the maximum input clock jitter can be?

 I appreciate any feedback you can provide,

-Amanda

  • 0
    TI__Intellectual 2915 points
    Hi Amanda,

    The jitter transfer function -3dB bandwidth is showing the input clock jitter on CML Timing Specifications table on page 9 of datasheet. Given the 3.125Gbps, the -3dB bandwidth is 300KHz. For the 10psec jitter, it’s the amplitude of the jitter. What are the frequency and waveform of the jitter setup profile? If the jitter frequency is at the jitter peaking (270Khz to 300Khz, right before the -3dB bandwidth – PLL loop bandwidth), the jitter also possibly increases jitter peaking. If the jitter is in the square waveform, the PLL can be hard to track the jitter and lose lock in the Serializer. All of them can contribute to the jitter performance. If the jitter frequency is higher than 300Khz or more, jitter will be attenuated after the PLL loop bandwidth. It depends on the jitter frequency before the PLL and loop bandwidth /jitter transfer function.

    To evaluate this, you can use J-BERT N4903A for generating the jitter to the input clock of Serializer, and use the scope with DPOJET measurement to measure the output jitter at the frequency of the jitter source. It’s important that the test equipment is able to separate the frequency and read the jitter. We don’t have a characterization data on this test of this Serializer.

    Regards,
    Dennis