PCA9306: Are there issues if Vref1 is absent?

Hello Carolus,
Do they expect the device to work during this condition? You could potentially pass the Vref2 voltage - Vth to the Vref1 side of the device pins if you leave Ref1, SCL1, and SCA1 floating. That means if you have a 1.8V device on Vref1 side and a 3.3V on Vref2 side, then you could place a week pull up to 3.3V - Vth (0.7) = 2.5V on 1.8V device.

Can you give me more information about the application and exactly what they are trying to do and why?
-Francis houde

Dear Francis,

Ideally, no. Their original want in design was to be able to tie the enable pin and Vref1 together such that the device works when Vref1 is set to 1.8V, and all I/O are in high impedance when Vref1 is off at 0V.

From my understanding of the device, I said this would not work because it appears in the datasheet that EN's logic high is actually a parameter based on Vref1 (datasheet says min is Vref1+.6V), so if this is true, with these two tied together, the device never becomes capable of being enabled, regardless of the voltage on Vref1.

So, with that in mind, I know some of our other devices enter a high impedance state on I/O when either of the supplies is missing, so I was curious as to this device's behavior when Vref1 is at 0V, and if there is a configuration that can aciheve the above design structure.

Francis,

Also,

what happens if Vref1 and Vref2 are both left unpowered, while the pullups on the Vref1 side are supplied with 3.3v? Can the I2C buss on an MSP430 still be used (which isis connected to the Vref1 side), as it will still be powered.

Francis,

Any movement on this?