TLK105L: TKL105L and phy pattern

Hello Jumelle,

There have not been any changes in TLK105L between 2015 and 2017. Can you elaborate more on what tests are you conducting and the register settings? Also, was there a design change on your board between 2015 and 2017 like schematics, board, or BOM?

-Regards,
Aniruddha

Hi,

We have no change on schematics, board or BOM between 2015 and now.

We write 0x2100 in BMCR register and 0x3000 in BISCR

Thomas

Hi Thomas,

For the test, what does BISCR read?
0x3000 indicates that the PHY is in a sleep mode because of bit[8].
Please confirm the values of the following registers after configuration:
0x0h, 0x2h, 0x3h, 0x16h, and 0x17h

Thank you,
Ross

Hi,

Thank for yours answers, my previous problem is solved, phy pattern is gerenated correctly. It isn't problem, just an communication problem between my costumer and me.

We realize an eye diagram. The measurement device realize 100 samples and if 100 of 100 is good the test is good for the measurement device.

But the signal don't use all the way (see picture below)

What to do to use all the way? is it good enough to validate IEEE standard ? phy pattern not generate all possible combination ?

Hi Thomas,

What you might need to do is increase the capture length.
When register 0x0h is configured for 0x2100h, the device will send out 100Mbps idle stream.
After a long enough capture you will see all transitions fill the template.

However, how you have it already confirms the interface is operating correctly and that it is passing.
It should be sufficient how you currently have it.

Kind regards,
Ross

Hi Ross,

To use packet generator, is it an obligation to force link speed to 100Mbps (reg 0x00 = 0x2100) ?