Hi all
Would you mind if we ask DP83822?
Just in case, we would you like to confirm Hardware Bootstrap Configurations.
The datasheet shows as follows;
"The values of these pins are sampled at power-up and/or hardware reset, through either the RESET pin or bit[15] in the PHY Reset Control Register (PHYRCR, address 0x001F)."
Only at power-up and/or hardware reset, are the values of these sampled?
So, after power-up or hardware reset, is it possible to configure functional pins using MDIO/MDC?
We guess that it is used for hardware configuration without MDIO/MDC.
Is our recognition correct?
Kind regards,
Hirotaka Matsumoto