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TUSB9261: Power up sequence after considering ERRATA

Shinichi Inoue
Guru 21646 points
Part Number: TUSB9261

Dear Specialists,

My customer would like to confirm the power up sequence of TUSB9261 after considering ERRATA.

Could you please see and advise following questions ?

---question---

According to the datasheet, recommended core power(VDD=1.1V) and I/O power(VDD33=3.3V) at the same time.

On the other hand, 1.1V power up time should be equal to or less than 3.3V power supply.

http://www.tij.co.jp/jp/lit/er/sllz065b/sllz065b.pdf

Is there any limitation of timing spec between core power(1.1V) and I/O power(3.3V) ? 

Current situation, once the device has failed in recognition, it never restart by GRSTz.

I appreciate your great help in advance.

Best regards,

Shinichi 

  • 0
    TI__Guru* 76130 points

    Hello,

    Is there any limitation of timing spec between core power(1.1V) and I/O power(3.3V) ?

    [answer]: No, there is no specified time, as long as VDD is in the valid "high" limit before the VDD33 rail everything will work fine.

    You can share your schematics for review.

    Regards