• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 2 answers
  • Subscribers 33 subscribers
  • Views 999 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83867IS: Internal Strap pull-down

Daniel Sommerfeldt
Prodigy 245 points
Part Number: DP83867IS

Is the internal strap pull-down of 9k always active or only while reset is active?

  • 0
    TI__Mastermind 19780 points
    Hi Dr. D,

    The pull-downs are always active.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Prodigy 245 points
    I have 8x DP83867IS in my design. How shall I connect the MDC/MDIO? All devices in chain? Or better split with resistors at the CPU in two chains? Using resistors for MDIO and buffer for MDC?
  • 0 in reply to Daniel Sommerfeldt
    TI__Mastermind 19780 points
    Hi Dr. D,

    Does your MAC/switch/processor have multiple SMI buses available? Usually on high port count devices, you have multiple SMI interfaces.

    For MDC, you may need to use a buffer as you mentioned. The MAC must provide MDC and an LVCMOS IO from a processor may not be able to drive the load of 8 PHYs easily.

    MDIO can be implemented with a single daisy-chain and a pull-up resistor like normal. Only use 1 MDIO pull-up in the design for all 8 devices! A parallel combination of 8x1.5k resistors will be too strong of a pull-up for the DP83867.

    Because you'll be using greater than 4 PHY addresses, please take care of the PHY address strapping resistor values for SGMII links.

    Best Regards,