DS110DF111: Propagation Delay

Sean Iwasaki

Part Number: DS110DF111

Hello:

Specification 6.5 Electrical Characteristics (Page 7) Propagation Delay (TPD) – Assuming the CDR is locked to the input signal, can you specify what parameters (input signal characteristics and register settings) which will produce the maximum propagation delay?

over 8 years ago

0 Lee Sledjeski over 8 years ago

TI__Mastermind 43795 points

Hi Sean,

The propagation delay is really setup by the internal architecture. The input characteristics and most register settings will have no impact.

The "Slow" output edge rate register control would slow down the output edge and add to the propagation delay by ~ 15ps.

Here are some environmental propagation delay variables from 2.5V and 25C operation.

1. +85C operation (add 10ps)

2. -40C operation (subtract 10 ps)

3. VDD = 2.375V (add 2ps)

Process variation estimate

1. Slowest (add 35ps)

2. Fastest (subtract 35ps)

Regards,

Lee

0 Sean Iwasaki over 8 years ago in reply to Lee Sledjeski

Intellectual 400 points

Lee:

Thank you for the answers, I just have 3 other related questions

1) Is TPD propagation parameter 350ps (retimed data) in section 6.5 page 7 based upon the DFE enabled?

2) Can you confirm that the enabling loopback would not add significant propagation delay?

Sincerely

Sean

0 Lee Sledjeski over 8 years ago in reply to Sean Iwasaki

TI__Mastermind 43795 points

Hi Sean,

The DFE will not increase the propagation delay.

The Loopback feature will not change the delay, the signal routing between internal channels is very short.