TUSB1210 input CLOCK spec

Rhino

Other Parts Discussed in Thread: TUSB1210, OMAP3515

Dear All

I have a question at CLOCK input terminal of TUSB1210.

By looking at the data sheet, SLLSE09A, I could not find specs of input frequency range, jitter, duty cycle for this device.

Pls advice me.

Best Regards,
Rhino

over 15 years ago

0 Peter Considine over 15 years ago

TI__Intellectual 1755 points

Rhino,

Yes, this information was omitted in the current datasheet.

The following specification will be included in the next TUSB1210 datasheet release.

4.1 USB PLL reference clock

The USB PLL block generates the clocks used to synchronize :

- the ULPI interface (60MHz clock)

- the USB interface (depending on the USB data rate, 480Mbps, 12Mbps or 1.5Mbps)

TUSB1210 requires an external reference clock which is used as an input to the 480MHz USB PLL block. Depending on the clock configuration, this reference clock can be provided either at REFCLK pin or at CLOCK pin.

By default CLOCK pin is configured as an input

Two clock configurations are possible:

- Input clock configuration (see section 4.1.1 below)

- Output clock configuration (see section 4.1.2 below)

4.1.1 ULPI input clock configuration

In this mode REFCLK must be externally tied to GND.

CLOCK remains configured as an input.

When the ULPI interface is used in “input clock configuration”, i.e., the 60MHz ULPI clock is provided to TUSB1210 on CLOCK pin, then this is used as the reference clock for the 480MHz USB PLL block.

Table 4‑1 Electrical Characteristics : CLOCK input

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
CLOCK input Duty Cycle		40		60	%
F_CLOCK CLOCK Nominal Frequency			60		MHz
CLOCK input Rise/Fall Time	In % of CLOCK period T_CLOCK ( = 1/F_CLOCK )			10	%
CLOCK input Freq Accuracy				250	ppm
CLOCK input Integrated Jitter				600	ps rms

4.1.2 ULPI output clock configuration

In this mode a reference clock must be externally provided on REFCLK pin

When an input clock is detected on REFCLK pin then CLOCK will automatically change to an output, i.e., 60MHz ULPI clock is output by TUSB1210 on CLOCK pin

Two reference clock input frequencies are supported. REFCLK input frequency is communicated to TUSB1210 via a configuration pin, CFG, see F_REFCLK in Table 4-2 for frequency correspondence.

TUSB1210 supports square-wave reference clock input only.

Table 4‑2 Electrical Characteristics : REFCLK

PARAMETER	TEST CONDITIONS	MIN	TYP	MAX	UNIT
REFCLK input Duty Cycle		40		60	%
F_REFCLK REFCLK Nominal Frequency	When CFG pin is tied to GND		19.2		MHz
F_REFCLK REFCLK Nominal Frequency	When CFG pin is tied to VDDIO		26		MHz
REFCLK input Rise/Fall Time	In % of REFCLK period T_REFCLK ( = 1/F_REFCLK )			20	%
REFCLK input Freq Accuracy				250	ppm
REFCLK input Integrated Jitter				600	ps rms

Best regards,

Peter

0 Brigols over 14 years ago in reply to Peter Considine

Prodigy 90 points

Hi,

I would like to ask some help to please send me a link or a copy on a reference schematic for the TUSB1210. We are currently developing a board using OMAP3515 based on Mistral EVM and has already a working prototype except for the USB host xcver port in which we are using SMSC USB3320, it might be on the interoperability problem that is mentioned on the recent errata of OMAP3515. And because of this we would like to replace our ULPI xcver to TUSB1210 but we dont have a guide or a reference schematic to be able to modify our existing schematic. If anyone has a reference design for Tusb1210 please send me a link or a copy of the reference schematic.

Thanks.

0 Peter Considine over 14 years ago in reply to Brigols

TI__Intellectual 1755 points

Brigols,

There is already an application diagram available in the TUSB1210 datasheet available on the TI website.

However if you require more details on differences between TUSB1210 and SMSC USB3320 and how to modify the board I could provide some more details via email.

Please send me your email address and I will reply directly to you.

Best regards,

Peter

0 Brigols over 14 years ago in reply to Peter Considine

Prodigy 90 points

Hi Peter,

Here is my email ad;

bambhemichael.brigoli@emerson.com

Please provide me the details and the needed work on the software side to implement the this chip.

Thanks and regards,

Brigols

0 Rock over 14 years ago in reply to Brigols

Prodigy 10 points

Hi:

Peter , Can you give me more details on differences between TUSB1210 and SMSC USB3320 and how to modify the board? My customer need it urgently.

And do you have TUSB1210 driver on WinCE? I suggest my customer design AM37x using TI's TUSB1210 followed by the TUSB2046B, Can you give me some suggestions?

my email is: rock.li@serialsystem.com

315676522@qq.com

Thanks!
-----------------------------------------------------------

There is already an application diagram available in the TUSB1210 datasheet available on the TI website.

However if you require more details on differences between TUSB1210 and SMSC USB3320 and how to modify the board I could provide some more details via email.

Please send me your email address and I will reply directly to you.

Best regards,

Peter

----

0 Philip over 14 years ago in reply to Rock

Expert 1510 points

Hi Peter,

I would like to know more about the differences between SMSC USB3320 and TUSB1210, would like to introduce TUSB1210 to my customer.

And if possible, advantages of TUSB1210 over USB3320.

Thanks.

My email address: philip.law@marubunarrow-asia.com

0 Peter Thoeming over 14 years ago in reply to Philip

Intellectual 300 points

Did you get an answer for this?

I'm a different "Peter", but perhaps this could help:

Not sure if it'll display correctly, but here's a quick XLS I made for a quick in-place replacement of the USB3320 with the TUSB1210:

Pin Number	SMSC USB3220	USB3220 Direction	Board Signal	TI TUSB1210	TUSB1210 Direction	Changes Required for ES2 Debug/Testing
1	CLKOUT	O	OPEN	REFCLK	I	tie to ground
2	NXT	O	hsusb1_nxt	NXT	O	OK
3	DATA0	I/O	hsusb1_data0	DATA0	I/O	OK
4	DATA1	I/O	hsusb1_data1	DATA1	I/O	OK
5	DATA2	I/O	hsusb1_data2	DATA2	I/O	OK
6	DATA3	I/O	hsusb1_data3	DATA3	I/O	OK
7	DATA4	I/O	hsusb1_data4	DATA4	I/O	OK
8	REFSEL0	I/O	1.8V	N/C		OK - true NC inside TUSB
9	DATA5	I/O	hsusb1_data5	DATA5	I/O	OK
10	DATA6	I/O	hsusb1_data6	DATA6	I/O	OK
11	REFSEL1	I/O	1.8V	CS	I	ok - tie high
12	N/C		N/C	VDD15	PO	add 2.2uF cap
13	DATA7	I/O	hsusb1_data7	DATA7	I/O	OK
14	REFSEL2	I	1.8V	CFG	I	OK
15	SPK_L	I/O	N/C	N/C		OK - true NC inside TUSB
16	SPK_R	I/O	N/C	N/C		OK - true NC inside TUSB
17	CPEN	O	N/C	CPEN	O	OK
18	DP	I/O	USB1DP	DP	I/O	OK
19	DM	I/O	USB1DN	DM	I/O	OK
20	VDD33	PO	2.2uF	VDD33	PO	OK
21	VBAT	PI	V_SYSIN	VBAT	PI	OK
22	VBUS	I/O	10K to 5V_USB	VBUS	I/O	Leave as is OR R345 = 0 Ohm
23	ID	I	DGND	ID	I/O	OK
24	RBIAS	Analog	8.2K	N/C		OK - true NC inside TUSB
25	XO	O	N/C	N/C		OK - true NC inside TUSB
26	REFCLK	I	hsusb1_clk	CLOCK	I	OK
27	RESETB	I	gpio_111	RESETB	I	OK
28	VDD18	PI	1.8V	VDD18	PI	OK
29	STP	I	hsusb1_stp	STP	I	OK
30	VDD18	PI	1.8V	VDD18	PI	OK
31	DIR	O	hsusb1_dir	DIR	O	OK
32	VDDIO	PI	1.8V	VDDIO	PI	OK
33	pad	GND	DGND	pad	GND	OK

Interface

Interface forum

TUSB1210 input CLOCK spec

4.1 USB PLL reference clock

4.1.1 ULPI input clock configuration

4.1.2 ULPI output clock configuration