• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 33 subscribers
  • Views 865 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS125DF1610: How to improve jitter tolerance

Lee, Sam
Expert 6055 points
Part Number: DS125DF1610

Hi team,

Can you please review the following questions for DS125DF1610? A customer is trying to tune Loop bandwidth of CDR to improve Jitter tolerance, so they ask about which registers to tune.

  -. Is Reg=0x0A bit[5:4] in below table the right register to optimize loop bandwidth?

  -. In addition, is there any recommended register to improve the jitter?

Thanks,

Best Regards,

Sam Lee

  • 0
    TI__Mastermind 19235 points

    Hi,

    To increase the CDR bandwidth, the user may set registers to increase the phase and frequency charge pump settings.

    • 0x0A[6] shjould be set to 1 to enable manual override of the charge pump settings
    • Channel registers 0x0C and 0x1C are then used to set the frequency and phase detector charge pumnp settings

    The example channel register write routine below illustrates how to set the charge pumps to a value of 5. Note that the default charge pumps setting is 4.

    REG       Value     Mask      Comment

    0A           40           40            //Enable over-ride of charge pump PD DAC

    1C           A0            E0          //PD CP DAC 5

    0C           00           01           //PD MSB 0

    1C           14           1C           //FD CP DAC 5

    0C           00           02           //FD MSB 0

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • 0 in reply to Rodrigo Natal
    TI__Expert 6055 points
    Hi Rodrigo,

    Thank you for your answer.

    Best Regards,
    Sam Lee