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PCA9548A: Master and Slave side I2C line total pull-up resistor calculation when channel x is selected

Part Number: PCA9548A

Hi, team,

I have one question about PCA9548A.

SDA/SCL and SDx/SCx are both pulled up to 3.3V separately, how to calculate the I2C DATA and CLK line total pull-up resistor value? Is it just calculate as resistor in parallel?

For example, when channel 0 is selected, and no other device is connected to I2C bus, is the whole DATA line pull-up resistor 4.7k//4.7k=2.35k? Or still calculate separately?

And for internal switch, is it just a CMOS switch? What is the resistor topology for both side if one switch is ON?

Thanks.

Johnny

  • Anyone can help on this?
  • Hi Johnny,

    You are right that the resistances will be considered in parallel when the switch is on. It is a FET-based switch with low on-state resistance.

    Max
  • Max,

    1. Customer found if SDA/SCL is pulled up, and SD0/SC0 is not pulled up through resistor, output voltage will be abnormal when channel 0 is selected. If internal switch is with low on-state resistance, i think SD0/SC0 voltage should be equal to SDA/SCL. Could you help explain this?

    2. If SDA/SCL and SD0/SC0 are all pulled up, once SD0/SC0 is shorted to GND, will there be a current flowing through internal switch without any protection?

    Thanks.
    Johnny
  • Please help on questions raised. Thanks.

  • Hi Johnny,

    In order to facilitate voltage level translation, the active switches only conduct current when one side of the device is pulled low (e.g., by an open-drain I2C driver). This means that you need pull-up resistors on both sides (SDA/SCL and SD0/SC0). Otherwise, there will be no way for the high-level signals to be driven.

    Max
  • Max,

    Thanks for reply. How about another question below?

    1. Customer found if SDA/SCL is pulled up, and SD0/SC0 is not pulled up through resistor, output voltage will be abnormal when channel 0 is selected. If internal switch is with low on-state resistance, i think SD0/SC0 voltage should be equal to SDA/SCL. Could you help explain this?

    Thanks.
    Johnny
  • Johnny,

    That's what I was trying to answer. The switch only has low resistance when driving low levels. High levels need to be pulled up by resistors. If pull-up resistors are not used then you won't get the right output voltages/waveforms.

    Max
  • Max,

    I am confused about this "The switch only has low resistance when driving low levels.".

    You mentioned that "the resistances will be considered in parallel when the switch is on. It is a FET-based switch with low on-state resistance."

    So how about the resistance when driving high and switch is on? Not in parallel?

    Thanks.

    Johnny

  • When the bus state is high, each side is pulled up individually by pull-up resistors to their own respective power supplies. This allow for different pull-up voltages to be used on either side of the switch.

    Max