DS90UH948-Q1: Default register value for Port 1

Hi,

Could you please send me your feedback ?

Best Regards,

Machida

Hello,
Please do not set both Port select bits at the same time, set either bit 0 or bit 1 and clear the other bit, 0x34[10] = 01 or 0x34[1:0] = 10.

Hi, Liam-san,

Thank you for your reply.

>Please do not set both Port select bits at the same time, set either bit 0 or bit1 and clear the other bit, 0x34[10] = 01 or 0x34[1:0] = 10.

According to UH948 datasheet, there is following description.

"Setting the PORT1_SEL and PORT0_SEL bit will allow a read of the register for the selected port. If both bits are

set, port1 registers will be returned. Writes will occur to ports for which the select bit is set, allowing simultaneous

writes to both ports if both select bits are set."

So, I'm not sure why you describe as shown above.

Do you have plan to change description about above sentence ?

And also, do you think that this phenomenon influences above setting (both port select are set) ?

Best Regards,

Machida 

Hi Machida,

I double-checked these on our EVM and your values are correct. The datasheet needs to be updated with these default values for D_GPIO. I've logged it as a bug to be fixed.

It's fine if you have both PORT1_SEL and PORT0_SEL set at the same time.

Thanks,
Jason

Hi Jason-san,

Thank you for your reply and response.

>I double-checked these on our EVM and your values are correct. The datasheet needs to be updated with these default values for D_GPIO. I've logged it as a bug to be fixed.

According to your comment, I understood that default value for following registers of PORT0 and PORT1 were different. And you will describe each default value for following registers in furure datasheet.

Is my understanding correct ?

0x1D GPIO0 Config
0x1E GPIO1_2 Config
0x1F GPIO3 Config
0x56 CML OUTPUT ENABLE

If you have other registers which you will describe each default value, please let me know.

Best Regards,

Machida