• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 914 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB964-Q1: line blanking

Kai Hsiao
Guru 12675 points
Part Number: DS90UB964-Q1

Dear Sir 

We use 964 for 4 camera in Line-Interleave forwarding and cpu's frame buffer will be overflow 

1. If we use  964 for Line interleave format ,May I know line blanking time is decided by Camera side or 964 side ??

2. if decide by 964 side ,may I know how to modify ?

3. If line blanking time can't be modified ,How could I solve this issue ?? (use interrupt??)

Thanks  

  • 0
    TI__Mastermind 30515 points
    Kai,
    1. If we use 964 for Line interleave format ,May I know line blanking time is decided by Camera side or 964 side ??
    A. by 964.
    2. if decide by 964 side ,may I know how to modify ?
    A. can not be changed. the timing is dependent on the MIPI lane rate and video rate, and the format follows mipi2.0 spec.
    3. If line blanking time can't be modified ,How could I solve this issue ?? (use interrupt??)
    A. Please see page18 in d/s, the blanking could match the LPS based on mipi timing sepc, so the attached processor should can detect the LPS and just drop down the image data, it does not matter with the blanking timing if mipi lane rate is correct.

    best regards,
    Steven