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TMDS181: Dual-Link DVI Configuration

Part Number: TMDS181


Hello,

I have a DVI design which is having some difficulties with the equalizer and I am thinking of replacing it with the TMDS181, specifically for the reclocking.  Can this part be used in a dual-link configuration?  The data lines are obvious but there are multiple possibilities for the clock.

 

 

1)      Does it matter which IC the clock goes to first 0,1,2  or  4,5,6 ?

2)      Does it matter if nothing is coming in on half the data lines – Single link data?

3)      Any other issues I haven’t thought about?

Don

  • Hi Don,

    The TMDS181 has not been evaluated in a dual link DVI retimer / redriver application. My concerns with this application are that the clock will be skewed between the two TMDS181 devices. Also, if the clock is active, the TMDS181 may try to retime / redrive noise from the data lines if there is no valid data.

    Regards,
    JMMN
  • Thanks for the reply.

    A few more questions:

    1) I've been doing some reading and discovered that there is no phase requirement between the clock and data lines on a DVI interface– does the TMDS181 have any phase requirements for the clock relative to the data? If not the added phase delay of the clock in the second equalizer should not be a problem.

    2) Does the TMDS181 do anything to the clock signal that could cause problems when the clock is run through a second equalizer? Does the clock get re-timed in any way as it passes through the TMDS181 – something that might interfere with the retiming of the second equalizer?

    3) Does the presence, absence, or quality of the data inputs in any way affect the clock output of the equalizer? This relates to inputting a single link signal into the dual link input.

    Don
  • Hi Donald,

    The TMDS181 has no phase requirements between TMDS_CLK and TMDS_DATA, the videon on the second TMDS181 will be available sme time after the first TMDS181 is working properly.
    The TMDS181 in retimer mode will recover the TMDS_CLK and will use it to recover the data, then recover clock and data are transmitted.
    Data signals won't affect the behavior of the clock.
    You have to select the right EQ of the second TMDS181 to avoid over-equalizing.
    As JMMN has mentioned, this application hasn't been evaluated by TI.

    Regards