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DS100BR111: SATA Application in EEPROM Mode

Part Number: DS100BR111

Hello, I plan to use the DS100BR111 for a SATA re-driver application and have a few questions around the EEPROM configuration mode.

Section 9.1.2 of the data sheet notes that for SAS/SATA applications fast idle must be enabled to pass OOB signaling, this is done by setting Reg 0x28 to 0x4C. However, if loading configuration data from an external EEPROM the EEPROM to SMBUS mapping table 6 stops at Reg 0x27, indicating it is not possible to set fast idle bit with an external EEPROM.

Q1: How do you configure the DS1000BR111 for a SATA application when an external EEPROM is used?

Q2: Reg 0x04 lists bits 7:6 as eSATA Mode Enable what does this do if enabled? Is it the same as eSATA Mode via pin strapping (Fast OOB, Auto Low Power on 100 μs of inactivity. SD stays active)

Q3: Why does the SMBUS to EEPROM mapping in table 6 stop at Reg 0x27 when CH B VOD control is at 0x2D? Is it possible to set CH B VOD in EEPROM Mode?

  • I looked at the mapping table again and see now that the mapping to the SMBUS registers are not one to one. I see that the bits I noted are settable in the EEPORM map.

     

    Few follow-up questions on the data sheet:

     

    Q1: If I want to strap a pin high or low and I tie it directly to VDD or GND and save the resistor or is the resistor required? Section 8.3.1 mentions minimizing 2.5V internal regulator start-up current, would this be impacted by not using a 1K resistor?

     

    Q2: If I strap the device into EEPROM mode, after the EEPROM loads the data sheet notes the part reverts to SMBUS slave mode. Does this mean I can then access the SBMUS register using the I2C port (eg like the part had been strapped to SMBUS slave mode to begin with)?

  • Hi Jeremy,

    I would recommend that you utilize the Sigcon Architect GUI to help create the EEPROM data file.  You can create an EEPROM file even in "demo mode".

    Q1:  The startup current will be slightly higher, the 1K resistance is optional.  Some pins can strap to more than two levels.  For configuration inputs with 4-level strapping, resistor footprints will be needed to access all the levels.  Note that if Vin=3.3V the any pullup for strapping should also go to 3.3V.

    Q2:  Yes.  After the EEPROM is completed loading the the DONE# pin goes low.

    The Sigcon Architect page on ti.com is www.ti.com/.../sigconarchitect

    Regards,

    Lee

  • Hi Lee, I did not get a complete answer for Q2. After EEPROM loading is complete and the done# signal goes low does the part revert to SMBUS slave mode just like if I had strapped it that way to begin with?

    For example, can I load defaults with the EEPROM and then later on change some of those values over the SMBUS?

    Jeremy

  • Yes, it is possible to change the SMBus register settings after the DONE# setting has gone "low".

    Regards,

    Lee