TLK110: How to configure for 10Base-T Harmonics compliance

Hi Arsalan,

It could be a problem with register writes.

Register 0x27 is in the extended register space and sometimes is difficult to make sure you are accessing it correctly. A lot of MDIO controllers integrated into MACs don't use the same extended register space access method that the TLK family has.

Please follow the steps in section "4.3.1.3 Write (no post increment) Operation" of the TLK110 datasheet to ensure you are setting register 0x27 correctly.

Please let me know if this clears up your issues.

Best Regards,

Hi Rob,

Thanks, I am able to write using extended addressing. However, after writing 0x0013 to register 0x27, I see a 25 MHz sine wave on the TX (which is probably the phy clock). This happens with or without link partner.

I am going to try writing 0x0014 next (following this recipe using extended writes) but can you comment on the sine wave?

Arsalan

Hi,

After writing 0x0014 to register 0x27, we see the same 25 MHz sinusoid as we saw with 0x0013 earlier. Is there some register(s) we can dump to debug this issue?

Arsalan

Hi,

Below is my config (either 0x0013 or 0x0014 can be used).

  regValAdr = 0x0000;
  PhyRegWrite(cpswinst->mdio_base,
          cpswinst->port[slv_port_num - 1].phy_addr,
          0x0,
          regValAdr);
  PhyRegRead(cpswinst->mdio_base,
           cpswinst->port[slv_port_num - 1].phy_addr,
           0x0,
           &regValAdr);

  regValAdr = 0x001F;
  PhyRegWrite(cpswinst->mdio_base,
           cpswinst->port[slv_port_num - 1].phy_addr,
           0xD,
           regValAdr);
  regValAdr = 0x0027;
  PhyRegWrite(cpswinst->mdio_base,
           cpswinst->port[slv_port_num - 1].phy_addr,
           0xE,
           regValAdr);
  regValAdr = 0x401F;
  PhyRegWrite(cpswinst->mdio_base,
           cpswinst->port[slv_port_num - 1].phy_addr,
           0xD,
           regValAdr);
  regValAdr = 0x0014;
  PhyRegWrite(cpswinst->mdio_base,
           cpswinst->port[slv_port_num - 1].phy_addr,
           0xE,
           regValAdr);
  PhyRegRead(cpswinst->mdio_base,
           cpswinst->port[slv_port_num - 1].phy_addr,
           0xE,
           &regValAdr);

I am following steps 1-4 from 4.3.1.3 to write and step 4 from 4.3.1.4 for immediate read of register 0x27.

Arsalan

Hi Arsalan,

Here is a list of the different configurations you can enable in the TLK110.

Kind regards,

Ross